Design and Implementation of CMOS 64-Bit Comparator Using Different Technologies

Kanika Hans, Amandeepkaur Dhaliwal

Design and Implementation of CMOS 64-Bit Comparator Using Different Technologies, Kanika Hans, Amandeepkaur Dhaliwal, International Journal of Electrical and Electronics Research, ISSN 2348-6988 (online), Research Publish Journals

Abstract: we represent a high speed and average power consumption 64-Bit Comparator using CMOS technology. Comparison is most basic arithmetic operation that compares one number is greater than, less than or equal to. Comparator is used for comparison operation. Comparison between these different technology is calculated by simulation that is performed at different technologies in Tanner EDA tool. 

Keywords: N-Bit Comparator, delay, power consumption.

Title: Design and Implementation of CMOS 64-Bit Comparator Using Different Technologies

Author: Kanika Hans, Amandeepkaur Dhaliwal

International Journal of Electrical and Electronics Research  

ISSN 2348-6988 (online)

Research Publish Journals

 

 

Vol. 5, Issue 2, April 2017 – June 2017

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Design and Implementation of CMOS 64-Bit Comparator Using Different Technologies by Kanika Hans, Amandeepkaur Dhaliwal