Abstract: In this paper we are going to design and synthesis of PDM/ DP-QSPK/BPSK Transceiver. All this techniques are very important in analog digital communication .These techniques can also implemented by using VHDL or VERILOG language. The digital system of QPSK is planned using a reversible logic gates which yields in low power, less required area and less amount of delay. These techniques can easily implemented on FPGA. Some simulation results of these techniques are also in presented in this paper.
Keywords: VHDL or VERILOG language, PDM/ DP-QSPK/BPSK.
Title: Design and Synthesis of PDM/DP-QPSK/BPSK Transceiver
Author: Sumedha Chhikara, Manju Bala
International Journal of Electrical and Electronics Research
ISSN 2348-6988 (online)
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